HPC Systems at the University of Bonn
The University of Bonn runs two small HPC systems Bonna and Bender for small-scale computing projects. Bonna is a Massively Parallel Processing (MPP) cluster, Bender is a Graphics Processing Unit (GPU) cluster. A third, much bigger system called Marvin is currently being purchased. Marvin will consist of both MPP and GPU partitions, being at least an order of magnitude bigger than both Bonna and Bender combined.
Bonna – MPP Cluster
The cluster Bonna was purchased and installed in 2019 to meet small-scale needs for HPC resources. Bonna is a pure MPP cluster with 2240 cores. It is currently maintained by Fraunhofer SCAI.
Bender – GPU Cluster
For teaching and small research projects (e.g. a bachelor or master thesis) the University of Bonn offers the small GPU cluster Bender, consisting of 16 Nvidia A40 GPUs. Bender is currently open to all members of the University of Bonn. An application form can be found in the system description.
Purchased: Marvin – State of the Art Tier 3 Cluster
A much bigger HPC system, both with large MPP, as well as two extensive GPU partitions, has just been purchased from Megware. We expect Marvin to be available for modellers by summer 2023 already, hoping that the estimations for delivery times remain stable.
Borg – Common Infrastructure for our HPC Clusters
Access all linked HPC clusters and their file systems from shared login nodes and work on shared HOME folders anywhere.
Research Data Management
The University and State Library Bonn (Universitäts- und Landesbibliothek Bonn, ULB) and the University Computer Centre (Hochschulrechenzentrum, HRZ) offer a common and central service for professional research data management.
HPC Projects
In addition to productive HPC ressources, the HPC team works on smaller playful yet educational projects. At this point in time, we offer students and trainees to build themselves a tiny HPC cluster, consisting of Raspberry Pis. Similar projects will be planned in the future.
HAL – Raspberry Pi Cluster
A tiny cluster continously re-assembled within the context of our workshops to demonstrate the basics of an HPC cluster's architecture.